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FEATURES 4 ns Propagation Delay at 5 V Single Supply Operation: 3 V to 5 V 100 MHz Input Latch Function APPLICATIONS High-Speed Timing Clock Recovery and Clock Distribution Line Receivers Digital Communications Phase Detectors High-Speed Sampling Read Channel Detection PCMCIA Cards Zero Crossing Detector High-Speed A/D Converter Upgrade for LT1394 and LT1016 Designs GENERAL DESCRIPTION
Ultrafast 4 ns Single Supply Comparators AD8611/AD8612
PIN CONFIGURATIONS 8-Lead Narrow Body SO (SO-8)
V IN IN V OUT OUT GND LATCH
AD8611
8-Lead MSOP (RM-8)
V IN IN V 1 8 OUT OUT GND LATCH
AD8611
4 5
The AD8611/AD8612 are single and dual 4 ns comparators with latch function and complementary output. Fast 4 ns propagation delay makes the AD8611/AD8612 a good choice for timing circuits and line receivers. Propagation delays for rising and falling signals are closely matched and track over temperature. This matched delay makes the AD8611/AD8612 a good choice for clock recovery, since the duty cycle of the output will match the duty cycle of the input. The AD8611 has the same pinout as the LT1016 and LT1394, with lower supply current and a wider common-mode input range, which includes the negative supply rail. The AD8611/AD8612 is specified over the industrial (-40C to +85C) temperature range. The AD8611 is available in both 8-lead MSOP and narrow SO-8 surface mount packages. The AD8612 is available in 14-lead TSSOP surface-mount package.
14-Lead TSSOP (RU-14)
QA 1 QA
2 14 13
QB QB GND
GND 3 LE A 4 V IN A
AD8612
12
TOP VIEW 11 LE B 5 (Not to Scale) 10 V+
6 9 8
IN B IN B+
IN A+ 7
REV. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 (c) Analog Devices, Inc., 2000
AD8611/AD8612-SPECIFICATIONS
ELECTRICAL SPECIFICATIONS
Parameter INPUT CHARACTERISTICS Offset Voltage Offset Voltage Drift Input Bias Current Input Offset Current Input Common-Mode Voltage Range Common-Mode Rejection Ratio Large Signal Voltage Gain Input Capacitance LATCH ENABLE INPUT Logic "1" Voltage Threshold Logic "0" Voltage Threshold Logic "1" Current Logic "0" Current Latch Enable Pulsewidth Setup Time Hold Time DIGITAL OUTPUTS Logic "1" Voltage Logic "1" Voltage Logic "0" Voltage DYNAMIC PERFORMANCE Input Frequency Propagation Delay Propagation Delay Differential Propagation Delay (Rising Propagation Delay vs. Falling Propagation Delay) Rise Time Fall Time POWER SUPPLY Power Supply Rejection Ratio V+ Supply Current2 Ground Supply Current2 V- Supply Current2
NOTES 1 Guaranteed by design. 2 Per comparator. Specifications subject to change without notice.
(@ V+ = 5.0 V, V- = VGND = 0 V, TA = 25 C unless otherwise noted)
Conditions Min Typ 1 -40C TA +85C VCM = 0 V -40C TA +85C VCM = 0 V 0 V VCM 3.0 V RL = 10 k -6 -7 0.0 55 4 -4 -4.5 4 3.0 85 3,000 3.0 1.65 1.60 -0.3 -2.7 3 0.5 0.5 IOH = 50 A, VIN > 250 mV IOH = 3.2 mA, VIN > 250 mV IOL = 3.2 mA, VIN > 250 mV 400 mV p-p sine wave 200 mV Step with 100 mV Overdrive1 -40C TA +85C 100 mV Step with 5 mV Overdrive 100 mV Step with 100 mV Overdrive1 20% to 80% 80% to 20% 4.5 V V+ 5.5 V -40C TA +85C VO = 0 V, RL = -40C TA +85C -40C TA +85C 55 3.0 2.4 3.35 3.4 0.25 100 4.0 5 5 Max 7 8 Unit mV mV V/C A A A V dB V/V pF V V A A ns ns ns V V V MHz ns ns ns
Symbol VOS VOS/T IB IB IOS VCM CMRR AVO CIN VIH VIL IIH IIL tPW(E) tS tH VOH VOH VOL fMAX tP tP tP
2.0 VLH = 3.0 V VLL = 0.3 V -1.0 -5
0.8
0.4
5.5
0.5 2.5 1.1 73 5.7 3.5 2.2
2.0
ns ns ns dB mA mA mA mA mA mA
PSRR I+ IGND I-
10 10 7 7 4 5
-2-
REV. 0
AD8611/AD8612 ELECTRICAL SPECIFICATIONS
Parameter INPUT CHARACTERISTICS Offset Voltage Input Bias Current Input Common-Mode Voltage Range Common-Mode Rejection Ratio OUTPUT CHARACTERISTICS Output High Voltage Output Low Voltage POWER SUPPLY Power Supply Rejection Ratio Supply Currents V+ Supply Current2 Ground Supply Current2 V- Supply Current2 DYNAMIC PERFORMANCE Propagation Delay
(@ V+ = 3.0 V, V- = VGND = 0 V, TA = 25 C unless otherwise noted)
Conditions Min Typ 1 -4.0 -4.5 Max 7 Unit mV A A V dB V V dB 6.5 10 3.5 5.5 3.5 4.8 6.5 mA mA mA mA mA mA ns
Symbol VOS IB IB VCM CMRR VOH VOL PSRR I+
VCM = 0 V -40C TA +85C 0 V VCM 1.0 V IOH = -3.2 mA, VIN > 250 mV IOL = +3.2 mA, VIN > 250 mV 2.7 V V+ 6 V VO = 0 V, RL = -40C TA +85C
-6 -7 0 55 1.21
1.0
0.3 46 4.5 2.5
IGND I-
-40C TA +85C 2 -40C TA +85C
tP
100 mV Step with 20 mV Overdrive3
4.5
NOTES 1 Output high voltage without pull-up resistor. It may be useful to have a pull-up resistor to V+ for 3 V operation. 2 Per comparator. 3 Guaranteed by design. Specifications subject to change without notice.
ABSOLUTE MAXIMUM RATINGS
Total Analog Supply Voltage . . . . . . . . . . . . . . . . . . . . . 7.0 V Digital Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . 7.0 V Input Voltage1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 V Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . 5 V Output Short-Circuit Duration to GND . . . . . . . . . Indefinite Storage Temperature Range R, RU, RM Packages . . . . . . . . . . . . . . . -65C to +150C Operating Temperature Range . . . . . . . . . . . -40C to +85C Junction Temperature Range R, RU, RM Packages . . . . . . . . . . . . . . . . -65C to +150C Lead Temperature Range (Soldering, 10 sec) . . . . . . . 300C
Package Type 8-Lead SO (R) 8-Lead MSOP (RM) 14-Lead TSSOP (RU)
2 JA
JC
Unit C/W C/W C/W
158 240 240
43 43 43
NOTES 1 The analog input voltage is equal to 4 V or the analog supply voltage, whichever is less. 2 JA is specified for the worst-case conditions, i.e., JA is specified for device in socket for P-DIP and JA is specified for device soldered in circuit board for SOIC and TSSOP packages.
ORDERING GUIDE
Model AD8611ARM AD8611AR AD8612ARU
Temperature Range -40C to +85C -40C to +85C -40C to +85C
Package Description 8-Lead Micro SOIC 8-Lead Small Outline IC 14-Lead Thin Shrink Small Outline
Package Option RM-8 SO-8 RU-14
Branding Information G1A
CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD8611/AD8612 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
REV. 0
-3-
AD8611/AD8612
8 7
PROPAGATION DELAY - ns
18
V+ = 5V OVERDRIVE > 10mV
PROPAGATION DELAY - ns
14
V+ = 5V TA = 25 C OVERDRIVE = 5mV
PD
6 5
PD
12
PD+
4
PD+
8
3 2 1 0
6
2
0
50
25
0 25 50 TEMPERATURE - C
75
100
0
0.5
1.0 1.5 SOURCE RESISTANCE - k
2.0
2.5
Figure 1. Propagation Delay Over Temperature
Figure 4. Propagation Delay vs. Source Resistance
18 16
PD
8
V+ = 5V TA = 25 C
7
PD+
TA = 25 C STEP = 100 mV OVERDRIVE > 10 mV
PROPAGATION DELAY - ns
PROPAGATION DELAY - ns
14 12
PD+
6 5
PD
10 8 6 4 2 0
4 3 2 1 0
0
5
10 15 OVERDRIVE - mV
20
25
2
3
4 SUPPLY VOLTAGE - V
5
6
Figure 2. Propagation Delay vs. Overdrive
Figure 5. Propagation Delay vs. Supply Voltage
8 7 V+ = 5V TA = 25 C OVERDRIVE > 10mV
PD
35 TA = 25 C STEP = 100 mV OVERDRIVE = 50 mV
30
PROPAGATION DELAY - ns
PROPAGATION DELAY - ns
6
PD+
25
PD+
5 4 3 2 1 0
20 15
10 5
PD
0
0 20 40 CAPACITANCE - pF 60 80
2
3 4 5 COMMON-MODE VOLTAGE - V
6
Figure 3. Propagation Delay vs. Load Capacitance
Figure 6. Propagation Delay vs. Common-Mode Voltage
-4-
REV. 0
AD8611/AD8612
1.2 VS = 3V 1.0 0.35 0.30 0.8 +85 C 40 C 40 C 0.40 +25 C
LOAD CURRENT - V
VOS - mV
VS = 5V 0.6
0.25 0.20 0.15
+85 C +25 C
0.4
0.10 0.2 0.05 0 0
60
40
20
0
20
40
60
80
100
0
2
TEMPERATURE - C
4 6 8 SINK CURRENT - mA
10
12
Figure 7. Offset Voltage vs. Temperature
Figure 10. Output Low Voltage vs. Load Current (Sinking) Over Temperature
40 35 30 25
ISY+ - mA
4.0
V+ = 5V TA = 25 C
3.8
OUTPUT HIGH VOLTAGE - V
+85 C 3.6 3.4 +25 C 3.2 40 C 3.0 2.8 2.6 2.4
20 15 10 5 0
1
10 INPUT FREQUENCY - MHz
100
0
2
4 6 8 LOAD CURRENT - mA
10
12
Figure 8. Supply Current vs. Input Frequency
Figure 11. Output High Voltage vs. Load Current (Sourcing) Over Temperature
2.0 V+ = 5V 1.8 1.6
8 7 6
1.4
VS = 5V 5
TIMING - ns
1.0 0.8 0.6 SETUP TIME
ISY - mA
1.2
4 3 2 VS = 3V
0.4 HOLD TIME 0.2 0 50 25 0 25 50 TEMPERATURE - C 75 100 1 0
60
40
20
0 20 40 TEMPERATURE - C
60
80
100
Figure 9. Latch Setup and Hold Time Over Temperature
Figure 12. Supply Current vs. Temperature
REV. 0
-5-
AD8611/AD8612
0 0.5 1.0 1.5
V+ = 5V TA = 25 C
VIN
IGND - mA
2.0 VS = 3V 2.5 3.0 VS = 5V 3.5 4.0 4.5 50
VOLTAGE
0V VOUT
VIN TRACE - 10mV/DIV VOUT TRACE - 1V/DIV
50 0 TEMPERATURE - C 100
TIME - 2ns/DIV
Figure 13. IGND vs. Temperature
Figure 16. Falling Edge Response
0
V+ = 5V TA = 25 C VOUT
0.5
1.0 VS = 3V
VOLTAGE
ISY - mA
1.5
0V
2.0
VS = 5V
VIN
2.5
VIN TRACE - 10mV/DIV VOUT TRACE - 1V/DIV
3.0
60
40
20
0
20
40
60
80
100
TIME - 4ns/DIV
TEMPERATURE - C
Figure 14. ISY- vs. Temperature
Figure 17. Response to a 50 MHz 100 mV Input Sine Wave
V+ = 5V TA = 25 C
VOUT
VOLTAGE
0V
VIN
VIN TRACE - 10mV/DIV VOUT TRACE - 1V/DIV
TIME - 2ns/DIV
Figure 15. Rising Edge Response
-6-
REV. 0
AD8611/AD8612
Optimizing High-Speed Performance
As with any high-speed comparator or amplifier, proper design and layout should be used to ensure optimal performance from the AD8611/AD8612. Excess stray capacitance or improper grounding can limit the maximum performance of high-speed circuitry. Minimizing resistance from the source to the comparator's input is necessary to minimize the propagation delay of the circuit. Source resistance, in combination with the equivalent input capacitance of the AD8611/AD8612 creates an R-C filter that could cause a lagged voltage rise at the input to the comparator. The input capacitance of the AD8611/AD8612 in combination with stray capacitance from an input pin to ground results in several picofarads of equivalent capacitance. Using a surface-mount package and a minimum of input trace length, this capacitance is typically around 3 pF to 5 pF. A combination of 3 k source resistance and 3 pF of input capacitance yields a time constant of 9 ns, which is slower than the 4 ns propagation delay of the AD8611/AD8612. Source impedances should be less than 1 k for best performance. Another important consideration is the proper use of power supply bypass capacitors around the comparator. A 1 F bypass capacitor should be placed within 0.5 inches of the device between each power supply pin and ground. Another 10 nF ceramic capacitor should be placed as close as possible to the device in parallel with the 1 F bypass capacitor. The 1 F capacitor will reduce any potential voltage ripples from the power supply, and the 10 nF capacitor acts as a charge reservoir for the comparator during high-frequency switching. A continuous ground plane on the PC board is also recommended to maximize circuit performance. A ground plane can be created by using a continuous conductive plane over the surface of the circuit board, only allowing breaks in the plane for necessary traces and vias. The ground plane provides a low inductive current return path for the power supply, thus eliminating any potential differences at different ground points throughout the circuit board caused from "ground bounce." A proper ground plane will also minimize the effects of stray capacitance on the circuit board.
Upgrading the LT1394 and LT1016
common-mode voltage range to the comparator. Note that signals much greater than 3.0 V will result in increased input currents and may cause the comparator to operate more slowly. The input bias current to the AD8611 is 7 A maximum over temperature (-40C to +85C). This is identical to the maximum input bias current for the LT1394, and half of the maximum IB for the LT1016. Input bias currents to the AD8611 and LT1394 flow out from the comparator's inputs, as opposed to the LT1016 whose input bias current flows into its inputs. Using low value resistors around the comparator and low impedance sources will minimize any potential voltage shifts due to bias currents. The AD8611 is able to swing within 200 mV of ground and within 1.5 V of positive supply voltage. This is slightly more output voltage swing than the LT1016. The AD8611 also uses less current than the LT1016, 5 mA as compared to 25 mA of typical supply current. The AD8611 has a typical propagation delay of 4 ns, compared to the LT1394 and LT1016, whose propagation delays are typically 7 ns and 10 ns, respectively.
Maximum Input Frequency and Overdrive
The AD8611 can accurately compare input signals up to 100 MHz with less than 10 mV of overdrive. The level of overdrive required increases with ambient temperature, with up to 50 mV of overdrive recommended for a 100 MHz input signal and an ambient temperature of +85C. It is not recommend to use an input signals with a fundamental frequency above 100 MHz as the AD8611 could draw up to 20 mA of supply current and the outputs may not settle to a definite state. The device will return to its specified performance once the fundamental input frequency returns to below 100 MHz.
Output Loading Considerations
The AD8611 can deliver up to 10 mA of output current without increasing its propagation delay. The outputs of the device should not be connected to more than 40 TTL input logic gates or drive less than 400 of load resistance. The AD8611 output has a typical output swing between ground and 1 V below the positive supply voltage. Decreasing the output load resistance to ground will lower the maximum output voltage due to the increase in output current. Table I shows the typical output high voltage versus load resistance to ground.
Table I. Maximum Output Voltage vs. Resistive Load
The AD8611 single comparator is pin-for-pin compatible with the LT1394 and LT1016 and offers an improvement in propagation delay over both comparators. These devices can easily be replaced with the higher performance AD8611, but there are differences and it is useful to check that these ensure proper operation. The five major differences between the AD8611 and the LT1016 include input voltage range, input bias currents, propagation delay, output voltage swing, and power consumption. Input commonmode voltage is found by taking the average of the two voltages at the inputs to the comparator. The LT1016 has an input voltage range from 1.25 V above the negative supply to 1.5 V below the positive supply. The AD8611 input voltage range extends down to the negative supply voltage to within 2 V of V+. If the input common-mode voltage could be exceeded, input signals should be shifted or attenuated to bring them into range, keeping in mind the note about source resistance in Optimizing High-Speed Performance. Example: An AD8611 power from a 5 V single supply has its noninverting input connected to 1 V peak-to-peak high-frequency signal centered around 2.3 V and its inverting input connected to a fixed 2.5 V reference voltage. The worst-case input common-mode voltage to the AD8611 is 2.65 V. This is well below the 3.0 V input REV. 0 -7-
Output Load to Ground 300 500 1 k 10 k > 20 k
V+ VOUT, HI (typ) 1.5 V 1.3 V 1.2 V 1.1 V 1.0 V
Connecting a 500 -2 k pull-up resistor to V+ on the output will help increase the output voltage closer to the positive rail; in this configuration, however, the output voltage will not reach its maximum until at least 20 ns to 50 ns after the output voltage switches. This is due to the R-C time constant between the pull-up resistor and the output and load capacitances. The output pull-up resistor will not improve propagation delay.
AD8611/AD8612
The AD8611 is stable with all values of capacitive load; however, loading an output with greater than 30 pF will increase the propagation delay of that channel. Capacitive loads greater than 500 pF will also create some ringing on the output wave. Table II shows propagation delay versus several values of load capacitance. The loading on one output of the AD8611 does not affect the propagation delay of the other output.
Table II. Propagation Delay vs. Capacitive Load
SIGNAL COMPARATOR
VREF
R1
R2
CF
Figure 18. Configuring the AD8611/AD8612 with Hysteresis
CL < 10 pF 33 pF 100 pF 390 pF 680 pF
PD Rising
PD Falling
3.5 ns 5 ns 8 ns 14.5 ns 26 ns
3.5 ns 5 ns 7 ns 10 ns 15 ns
Here, the input signal is connected directly to the inverting input of the comparator. The output is fed back to the noninverting input through R1 and R2. The ratio of R1 to R1 + R2 establishes the width of the hysteresis window with VREF setting the center of the window, or the average switching voltage. The Q output will switch low when the input voltage is greater than VHI, and will not switch high again until the input voltage is less than VLO as given in Equation 1: VHI = ( V+ - 1.5 - VREF ) VLO = VREF x R1 + VREF R1 + R2
(1)
Using the Latch to Maintain a Constant Output
The latch input to the AD8611/AD8612 can be used to retain data at the output of the comparator. When the latch voltage goes high, the output voltage will remain in its previous state, independent of changes in the input voltage. The setup time for the AD8611/AD8612 is 0.5 ns and the hold time is 0.5 ns. Setup time is defined as the minimum amount of time the input voltage must remain in a valid state before the latch is activated for the latch to function properly. Hold time is defined as the amount of time the input must remain constant after the latch voltage goes high for the output to remain latched its voltage. The latch input is TTL and CMOS compatible, so a logic high is a minimum of 2.0 V and a logic low is a maximum of 0.8 V. The latch circuitry in the AD8611/AD8612 has no built-in hysteresis.
Input Stage and Bias Currents
R2 R1 + R2
Where V+ is the positive supply voltage. The capacitor CF is optional and can be added to introduce a pole into the feedback network. This has the effect of increasing the amount of hysteresis at high frequencies, which is useful when comparing relatively slow signals in high-frequency noise environments. At frequencies greater than fP, the hysteresis window approaches VHI = V+ - 1.5 V and VLO = 0 V. For frequencies less than P, the threshold voltages remain as in Equation 1.
Clock Timing Recovery
The AD8611 and AD8612 use a bipolar PNP differential input stage. This enables the input common-mode voltage range to extend from within 2.0 V of the positive supply voltage to 200 mV below the negative supply voltage. Therefore, using a single 5 V supply, the input common-mode voltage range is -200 mV to +3.0 V. Input common-mode voltage is the average of the voltages at the two inputs. For proper operation, the input common-mode voltage should be kept within the common-mode voltage range. The input bias current for the AD8611/AD8612 is 4 A, which is the amount of current that flows from each input of the comparator. This bias current will go to zero on an input that is high and will double on an input that is low, which is a characteristic common to any bipolar comparator. Care should be taken in choosing resistances to be connected around the comparator as large resistors could cause significant voltage drops due to the input bias current. The input capacitance for the AD8611/AD8612 is typically 3 pF. This is measured by inserting a 5 k source resistance in series with the input and measuring the change in propagation delay.
Using Hysteresis
Comparators are often used in digital systems to recover clock timing signals. High-speed square waves transmitted over a distance, even tens of centimeters, can become distorted due to stray capacitance and inductance. Poor layout or improper termination can also cause reflections on the transmission line, further distorting the signal waveform. A high-speed comparator can be used to recover the distorted waveform while maintaining a minimum of delay. Figure 19 shows the AD8611 used to recover a 65 MHz, 100 mV peak-to-peak distorted clock signal into a 4 V peak-to-peak square wave. The lower trace is the input to the AD8611 and the upper trace is the Q output from the comparator. The AD8611 is powered from a 5 V single supply.
VOUT 2V/DIV
20mV/DIV VIN
Hysteresis can easily be added to a comparator through the addition of positive feedback. Adding hysteresis to a comparator offers an advantage in noisy environments where it is not desirable for the output to toggle between states when the input signal is close to the switching threshold. Figure 18 shows a simple method for configuring the AD8611 or AD8612 with hysteresis. -8-
TIME - 10ns/DIV
Figure 19. Using the AD8611 to Recover a Noisy Clock Signal
REV. 0
AD8611/AD8612
A 5 V High-Speed Window Comparator
5V 5V R1 5V VHI 6 7 10 A1 3 4 1 1k Q1 500 Q2 1k VOUT
A window comparator circuit is used to detect when a signal is between two fixed voltages. The AD8612 can be used to create a high-speed window comparator, as shown in Figure 20. Here, the reference window voltages are set as: VHI R2 = R1 + R2 VLO R4 = R 3 + R4
R2
AD612
The output of the A1 comparator will go high when the input signal exceeds VHI, and the output of A2 will go high only when VIN drops below VLO. When the input voltage is between VHI and VLO, both comparator outputs will be low, turning off both Q1 and Q2, thus driving VOUT to a high state. If the input signal goes outside of the reference voltage window, then VOUT will go low. To ensure a minimum of switching delay, high-speed transistors are recommended for Q1 and Q2. Using the AD8612 with 2N3960 transistors provides a total propagation delay from VIN to VOUT of less than 10 ns.
Table III. Window Comparator Output States
VIN
Q1, Q2 = 2N3960
5V 9 R3 VLO 8 5
AD612
A2 11 14 12 1k 500
R4
PINS 2 AND 13 ARE NO CONNECTS
Figure 20. A High-Speed Window Comparator
VOUT = 200 mV +5V = 200 mV
Input Voltage VIN < VLO VLO < VIN < VHI VIN > VHI
REV. 0
-9-
AD8611/AD8612
SPICE Model * AD8611 SPICE Macro-Model Typical Values * 1/2000, Ver. 1.0 * TAM / ADSC * * Node assignments * * * * * * * * * .SUBCKT AD8611 * * INPUT STAGE * * Q1 Q2 RC1 RC2 CL1 CIN VCM1 D1 EOS * * Reference Voltages * EREF RREF * * CMRR=66dB, ZERO AT 1kHz * ECM1 30 98 POLY(2) (1,98) (2,98) 0 0.5 0.5 RCM1 30 31 10E3 RCM2 31 98 5 CCM1 30 31 15.9E-9 * * Latch Section * -10- REV. 0 98 0 POLY(2) (99,0) (50,0) 0 0.5 0.5 98 0 100E3 4 6 3 5 PIX 2 5 PIX 5 800E-6 non-inverting input | | | | | | | | 1 inverting input | | | | | | | 2 positive supply | | | | | | 99 negative supply | | | | | 50 Latch | | | | 80 DGND | | | 51 Q | | 45 QNOT | 65
IBIAS 99
4 50 1E3 6 50 1E3 4 1 99 5 3 6 3E-13 2 3E-12 7 DC 1.9 7 DX 1 POLY(1) (31,98) 1E-3 1
AD8611/AD8612
RX 80 51 100E3 E1 10 98 (4,6) 1 S1 10 11 (80,51) SLATCH1 R2 11 12 1 C3 12 98 5.4E-12 E2 13 98 (12,98) 1 R3 12 13 500 * * Power Supply Section * GSY1 99 52 POLY(1) (99,50) 4E-3 -2.6E-4 GSY2 52 50 POLY(1) (99,50) 3.7E-3 -.6E-3 RSY * * Gain Stage Av=250 fp=100MHz * G2 98 20 (12,98) 0.25 R1 20 98 1000 C1 20 98 10E-13 E3 97 E4 52 0 (99,0) 1 0 (51,0) 1 52 51 10 RB4 60 62 2000 CB3 99 61 0.5E-12 CB4 62 51 1E-12 RO3 66 64 1 D5 64 65 DX RO4 67 65 500 EO3 63 51 (20,51) 1 EO4 97 60 (20,51) 1 * * MODELS * .MODEL PIX PNP(BF=100,IS=1E-16) .MODEL NOX NPN(BF=100,VAF=130,IS=1E-14) .MODEL DX D(IS=1E-14) .MODEL SLATCH1 VSWITCH(ROFF=1E6,RON=500, +VOFF=2.1,VON=1.4) .ENDS AD8611
V1 97 21 DC 0.8 V2 22 52 DC 0.8 D2 20 21 DX D3 22 20 DX * * Q Output * Q3 Q4 99 41 46 NOX 47 42 51 NOX
RB1 43 41 2000 RB2 40 42 2000 CB1 99 41 0.5E-12 CB2 42 51 1E-12 RO1 46 44 1 D4 44 45 DX RO2 47 45 500 EO1 97 43 (20,51) 1 EO2 40 51 (20,51) 1 * * Q NOT Output * Q5 Q6 99 61 66 NOX 67 62 51 NOX
RB3 63 61 2000 REV. 0 -11-
AD8611/AD8612
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
8-Lead micro SO (RM-8)
0.122 (3.10) 0.114 (2.90)
8-Lead Small Outline IC (SO-8)
0.1968 (5.00) 0.1890 (4.80)
8 5 4
8
5
0.122 (3.10) 0.114 (2.90)
1 4
0.199 (5.05) 0.187 (4.75)
0.1574 (4.00) 0.1497 (3.80) 1
0.2440 (6.20) 0.2284 (5.80)
PIN 1 0.0256 (0.65) BSC 0.120 (3.05) 0.112 (2.84) 0.006 (0.15) 0.002 (0.05) 0.018 (0.46) SEATING 0.008 (0.20) PLANE 0.043 (1.09) 0.037 (0.94) 0.011 (0.28) 0.003 (0.08) 0.120 (3.05) 0.112 (2.84) 33 27
PIN 1 0.0098 (0.25) 0.0040 (0.10)
0.0688 (1.75) 0.0532 (1.35)
0.0196 (0.50) x 45 0.0099 (0.25)
0.0500 0.0192 (0.49) SEATING (1.27) 0.0098 (0.25) PLANE BSC 0.0138 (0.35) 0.0075 (0.19)
8 0 0.0500 (1.27) 0.0160 (0.41)
0.028 (0.71) 0.016 (0.41)
14-Lead Thin Shrink Small Outline (RU-14)
0.201 (5.10) 0.193 (4.90)
14 8
0.177 (4.50) 0.169 (4.30)
1
7
PIN 1 0.006 (0.15) 0.002 (0.05) 0.0433 (1.10) MAX 0.0256 (0.65) BSC 0.0118 (0.30) 0.0075 (0.19) 0.0079 (0.20) 0.0035 (0.090)
0.256 (6.50) 0.246 (6.25)
SEATING PLANE
8 0
0.028 (0.70) 0.020 (0.50)
-12-
REV. 0
PRINTED IN U.S.A.
C3862-2.5-4/00 (rev. 0) 01541

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